SPI¶

In this example we will show how to configure and test LPSPI8 on DART-MX91 and DT8MCustomBoard. The SPI pins on external connector J16 are used for SPI loopback test.

Note: LPSPI8 are only available when using DT8MCustomBoard.

Kernel configuration¶

Verify that the i.MX SPI driver (CONFIG_SPI_FSL_LPSPI) is enabled in your kernel configuration:

In menuconfig: Device Drivers -> SPI support -> <*> Freescale i.MX SPI controllers

Verify that the User mode SPI driver (CONFIG_SPI_SPIDEV) is enabled in your kernel configuration:

In menuconfig: Device Drivers -> SPI support -> <*> User mode SPI device driver support

Device Tree configuration¶

On the DART-MX91, lpspi8 is configured with a spidev device that can be used to test SPI. The following steps demonstrate how to test spidev.

Add spidev node¶

Edit /arch/arm64/boot/dts/freescale/imx91-var-dart-dt8mcustomboard.dtsi to modify cs-gpios property and add spidev node. GPIO2_0 will be used in this example to control SPI CS0.

&lpspi8 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_lpspi8>;
    cs-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
    status = "okay";

    /* Test SPI device */
    spidev@0 {
        reg = <0>;
        compatible = "var,spidev";
        spi-max-frequency = <1000000>;
        status = "okay";
    };
};

Configure LPSPI8 pins¶

&iomuxc {
    ...
    pinctrl_lpspi8: lpspi8grp {
        fsl,pins = <
            MX91_PAD_GPIO_IO00__GPIO2_IO0       0x31e
            MX91_PAD_GPIO_IO13__LPSPI8_SIN      0x31e
            MX91_PAD_GPIO_IO14__LPSPI8_SOUT     0x31e
            MX91_PAD_GPIO_IO15__LPSPI8_SCK      0x31e
        >;
    };
    ...
};

Recompile the kernel¶

Compile the kernel (only if kernel configuration was changed) and device tree and update the SOM.

SPI External Connector¶

LPSPI8 will be accessible on the following EVK pins:

J16.2 - SPI.SCLK
J16.4 - SPI.SS0
J16.6 - SPI.MOSI
J16.8 - SPI.MISO

Run SPI Test¶

Loop SPI.MOSI and SPI.MISO by putting a jumper on J16.6 and J16.8

Run SPI test tool

# spidev_test -v -D /dev/spidev0.0

The output of successful test should look like this:

spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 kHz)
TX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D  |......@.........................|
RX | FF FF FF FF FF FF 40 00 00 00 00 95 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF F0 0D  |......@.........................|

Using multiple SPI CS lines¶

The i.MX9 SPI controllers support up to 2 chip select lines.

In the example below GPIO1_12 and GPIO1_15 are used to control CS0 and CS1 respectively.
When selecting CS GPIO pins make sure they are not used to control other peripherals.

&lpspi8 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_lpspi8>;
    num-cs = <2>;
    cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
           <&gpio1 15 GPIO_ACTIVE_LOW>;
    status = "okay";

        chip1@0 {
               reg = <0>;
               ...
        };

        chip2@1 {
               reg = <1>;
               ...
        };
};